Cybersecurity and Quantum Biomedical Interdisciplinary Technologies (Cy-QuBIT) Lab

Research / Project

We explore the problem of stress prediction with a combination of behavioral time series sensor data, including Electrodermal Activity (EDA), Blood Volume Pulse (BVP), and Skin Temperature (ST) employing Recurrent Neural Networks (RNNs). The dataset is labeled with cortisol biomarker and TSST protocol for binary stress levels. Leveraging the capabilities of RNNs, specifically Long Short-Term Memory (LSTM) networks, this research examines the relationship between various behavioral patterns captured by sensors and cortisol levels. The experiment includes data from a targeted age group of 40 older adults. The RNN models are trained to forecast stress levels up to 4.5 minutes ahead, enabling proactive intervention strategies. We report an accuracy of 94% and 96% for RNN and LSTM respectively. Our early investigation showcases the potential of integrating multiple data modalities for accurate stress prediction, underscoring the importance of time series machine learning techniques in stress monitoring applications.

Cyber-physical control systems are critical infrastructures designed around highly responsive feedback loops that are measured and manipulated by hundreds of sensors and controllers. Anomalous data, such as from cyber-attacks, greatly risk the safety of the infrastructure and human operators. With recent advances in the quantum computing paradigm, the application of quantum in anomaly detection can greatly improve identification of cyber-attacks in physical sensor data. In this paper, we explore the use of strong pre-processing methods and a quantum-hybrid Support Vector Machine (SVM) that takes advantage of fidelity in parameterized quantum circuit to efficiently and effectively flatten extremely high dimensional data. Our results show an F-1 Score of 0.87 and accuracy of 87% on the HAI CPS dataset using an 8-qubit, 16-feature quantum kernel, performing equally to existing work and 13% better than its classical counterpart.

Modern applications such as the Internet of Things (IoT) devices, AI, and automotive applications widely use field-programmable gate arrays (FPGAs). However, many of these applications have limited power resources. Also, the existing FPGAs are vulnerable to side-channel attacks (SCAs) such as correlation-based power analysis (CPA) attacks. Therefore, designing low-power, CPA-resistant, and secure-by-design FPGA is required. In this article, two low-power and CPA-resistant hybrid CMOS/magnetic tunnel junction (MTJ) logic-in-memory-based configurable logic blocks (CLBs) have been proposed and compared to a state-of-the-art counterpart. The first proposed design is single output, and the second one is multioutput. The simulation results show that compared to the state-of-the-art secure CLB counterpart secured CLB (sCLB) by Zooker et al. (2020), the proposed CLB designs have 42% and 33% lower delay, 85% and 18% lower power consumption, and 86% and 63% fewer equivalent transistors. To implement one round of the PRESENT algorithm, the first and second designs have 85% and 77% fewer transistors, 42% and 33% lower delay, and 86% and 50% lower power consumption compared to their silicon-proven secure counterpart. Also, to implement convolution layers of binarized neural network (BNN), compared to this counterpart, the first and second proposed designs have 85% and 90% fewer equivalent transistors, 42% and 33% lower delay, and 86% and 79% lower power consumption. Also, the resiliency of the proposed designs against power analysis attacks has been investigated by exhaustive simulations and performing CPA attacks on PRESENT and Advanced Encryption Standard (AES) SBOX. Also, this resiliency has been investigated for different tunnel magnetoresistance ratios (TMRs) and supply voltages.

As quantum computers scale, the rise of multi-user and cloud-based quantum platforms can lead to new security challenges. Attacks within shared execution environments become increasingly feasible due to the crosstalk noise that, in combination with quantum computer’s hardware specifications, can be exploited in form of crosstalk attack. Our work pursues crosstalk attack implementation in ion-trap quantum computers. We propose three novel quantum crosstalk attacks designed for ion trap qubits: (i) Alternate CNOT attack (ii) Superposition Alternate CNOT (SAC) attack (iii) Alternate Phase Change (APC) attack. We demonstrate the effectiveness of proposed attacks by conducting noise-based simulations on a commercial 20-qubit ion-trap quantum computer. The proposed attacks achieve an impressive reduction of up to 42.2% in output probability for Quantum Full Adders (QFA) having 6 to 9-qubit output. Finally, we investigate the possibility of mitigating crosstalk attacks by using Residue Number System (RNS) based Parallel Quantum Addition (PQA). We determine that PQA achieves higher attack resilience against crosstalk attacks in the form of 24.3% to 133.5% improvement in output probability against existing Non Parallel Quantum Addition (NPQA). Through our systematic methodology, we demonstrate how quantum properties such as superposition and phase transition can lead to crosstalk attacks and also how parallel quantum computing can help secure against these attacks.

Spin transfer torque magnetic random access memory (STT-MRAM) offers a promising solution for low-power and high-density memory due to its compatibility with CMOS, higher density, scalable nature, and non-volatility. However, the higher energy required to write bit cells has remained a key challenge for its adaptation into battery-operated smart handheld devices. The existing low-energy writing solutions require additional complex control logic mechanisms, further constraining the available area. In this research, we propose a solution to design energy-efficient write circuits by incorporating two techniques together. First, we propose the sinusoidal power clocking mechanism replacing the DC power supply in the conventional CMOS design. Second, we propose three lookup table (LUT)-based control logic circuits and one write circuit to reduce the area and further minimize energy dissipation. The experimental results are verified over the case study implementations of 4×4 STT-MRAM macro designed using bit cell configurations: i) one transistor and one magnetic tunnel junction (MTJ) (1T-1MTJ) and ii) four transistors and two MTJs (4T-2MTJ). The post-layout simulation for the frequency range from 250 kHz to 6.25 MHz shows that the write circuit, which uses the proposed LUT-based control logic circuits and a write driver with a sinusoidal power supply, achieves more than a 65.05% average energy saving compared to the CMOS counterpart. Furthermore, the write circuit, which uses the proposed 6T write driver with the sinusoidal power supply, shows an improvement in energy saving by more than 70.60% compared to the CMOS counterpart. We also verified that the energy-saving performance remains relatively consistent with the change in temperature and the tunneling magnetoresistance (TMR) ratio.

Dual rail adiabatic circuit design offers hardware-level protection against side-channel power analysis attacks such as Differential Power Analysis (DPA) and Correlation Power Analysis (CPA) attacks. While considerable attention has been given to synthesizing logic tree-based adiabatic circuits, comparatively little attention has been given to generating truly secure circuit variants. This paper presents preliminary results for a secure dual rail adiabatic synthesis tool based on Binary Decision Diagrams (BDDs). The tool demonstrates encouraging performance in matching known optimal transistor counts for several basic logic gates, in addition to providing improvement over existing works on established benchmarks.

Anomaly detection is a crucial task in cyber security. Technological advancement brings new cyber-physical threats like network intrusion, financial fraud, identity theft, and property invasion. In the rapidly changing world, with frequently emerging new types of anomalies, classical machine learning models are insufficient to prevent all the threats. Quantum Machine Learning (QML) is emerging as a powerful computational tool that can detect anomalies more efficiently. In this work, we have introduced QML and its applications for anomaly detection in consumer electronics. We have shown a generic framework for applying QML algorithms in anomaly detection tasks. We have also briefly discussed popular supervised, unsupervised, and reinforcement learning-based QML algorithms and included five case studies of recent works to show their applications in anomaly detection in the consumer electronics field.